Iterative Hardware Design based TDOA with adjustable localization error optimizing energy consumption for wireless sensor networks

• Monji M. Zaidi,
• Imen R. Bouazzi,

Vol. 20, No. 1, January 31, 2026
10.3837/tiis.2026.01.023, Download Paper (Free):

• localization
• Optimization
• TDOA
• Error
• compromise
• hardware
• Iterations
• Add
• shift

Abstract

Accurate localization of sensor nodes is essential for the effective functioning of Wireless Sensor Networks (WSNs), widely used in environmental monitoring, healthcare, and industrial systems. This paper introduces an adaptive, hardware-efficient localization scheme that enhances both accuracy and energy performance. The key innovation is the Low Power Hardware Design for Low Cost Localization (LPHD-LCL), which improves the traditional Time Difference of Arrival (TDOA) technique. LPHD-LCL utilizes a coordinate synthesis method in a two-dimensional domain and iterative sample-based equations using simple ADD and SHIFT instructions to estimate node positions. An adaptive mechanism adjusts the number of iterations based on the initial localization error to ensure convergence. The paper also presents a model linking localization error with power consumption to evaluate design trade-offs. The LPHD-LCL design is a low-power, practical solution for real-world wireless sensor networks (WSNs). It balances precise localization with energy efficiency on platforms like Mica and MSP430, serving as a foundation for future energy-conscious sensor network applications.

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